• Low Power VLSI Design

• Asynchronous Circuit Design

• Nonvolatile Architectures for Energy Harvesting

• High Performance Cache Architectures

• Low Power Neuromorphic Circuit Design

• ML/AI

Foriegn Collaborations:

• Dr. Rajkumar Kubendrani, University of Pittsburg, PENNSYLVANIA. (Joint FD Thesis Supervision)

• Dr. Idaku Ishii, Robotics Laboratory, System Cybernetics, Graduate School of Engineering, Hiroshima University, Japan. (10 Days Hiroshima University Visit under BITS-Hiroshima exchange Program)

• Dr.-Ing Muhammad Shafique, Group Leader, Chair for Embedded Systems (CES), Karlsruhe Institute of Technology (KIT), (Joint FD Thesis Supervision)

Ph.D Thesis Supervision:

Completed (01):

• Thesis Title: Energy-Efficient Circuit Design for Energy- Autonomous IoT Systems Using Emerging Non-Volatile Memory

• Name : Dr. Kanika

• Completion: 2017-2021

Post-Doctoral Fellow Mentorship

PDF-(Ongoing-01)

• Research Work: High Performance Memory Computation

• Name : Dr. Kanika

• Completion: 2021-2023

Journal Reviewer:

• Reviewer, International Journal of Electronic, Taylor & Francis

• Reviewer, Journal of Supercomputing (SUPE), Springer

• Reviewer, IET Computers & Digital Techniques, Wiley

• Reviewer, Memories: Materials, Devices, Circuits and Systems, Elsevier

• Reviewer, Circuit World, Emerald Publishing