Ph.D (VLSI / Memories for Multicore)
University:
Departement of EEE, Birla
Institute of Technology and Science, Pilani
Year of
Completion: 2015
Thesis Tile: Techniques
to Improve the Performance of Cache Memories for Multi-Core
Processors
Supervisor:
Prof. S Gurunarayanan, Dean, WILP, BITS Pilani
M.Tech (Instrumentation)
University: University Centre for Instrumentation
and Microelectronics (UCIM/CIL),Panjab University, Chandigarh
Year of
Completion: 2005
Dissertation:
Design & Implementation of Floating Point Arithmetic Unit for
Application Specific Instruction Set Processor
Supervisor: Dr. Chandra Shekhar, Distinguished
Scientist & Former Director, CSIR-CEERI, Pilani
Duration: 6 months
M.Sc (Electronics)
University: School of
Electronics, DAVV, Indore (2002)
Year of
Completion: 2005
Dissertation:
Design
& Synthesis of Fixed point &
Floating
point Adder/Subractor block
Supervisor: Dr. Chandra Shekhar, Distinguished
Scientist & Former Director, CSIR-CEERI, Pilani
Duration:
2
months